遙遙領先Skyworks品牌推出一流的抖動衰減時鐘

Skyworks Introduces Best-in-Class Jitter Attenuating Clocks to Address High-Speed Communications’ Timing Requirements New Si536x Product Family Delivers Ultra-High Performance 55 fs RMS for 400/800G networks
Skyworks Solutions, Inc. (Nasdaq: SWKS) today launched its latest portfolio of jitter attenuators for high-speed networking, communications and data center equipment forming the backbone of today’s internet infrastructure. These new products are designed to meet the performance requirements of high-speed networks deployed to carry 5G traffic and support new applications like AI and edge computing. The new Si536x product family complements Skyworks’ current Si539x jitter attenuating clocks to suit the specific timing needs of designers and vendors.
Increasing demand for data bandwidth is driving the need for 400G/600G/800G+ Ethernet links using high-speed 56G/112G/224G PAM-4 SerDes and coherent optical technologies for internet infrastructure and data center environments. The Dell’Oro Group forecasts that these data rates currently comprise half of the total Ethernet data center, with 800G expected to dominate by 2025.1 These high-speed systems require multiple clocks at different frequencies, signaling formats and voltage levels with ultra-low jitter.
To address this need, the Si536x product family provides frequency flexibility and clock tree on-a-chip integration in a compact clock IC solution with up to 18 clock outputs featuring <55 fs RMS jitter, enabling optimal transceiver performance. The increased jitter margin also helps de-risk product development and accelerate time to market for networking equipment vendors.
“Skyworks’ latest product family continues the company’s long-standing history of developing innovative timing solutions, featuring its ultra-low jitter DSPLL® architecture with MultiSynth™ ‘any-frequency’ clock synthesis,” said James Wilson, vice president and general manager of timing products at Skyworks. “These products address the next generation of high-speed communications’ designs, allowing our customers to take advantage of the highest performance, lowest jitter clocks available.”
Skyworks’ Si536x family offers the following features and benefits:
Up to 18 outputs with any combination of frequencies up to 2.75GHz and a wide range of selectable output formats, including LVPECL, LVDS, CML, HCSL and LVCMOS. These output thresholds are also customizable to support chipsets that have non-standard formats.
Seamless input clock management with exceptional input reference clock switching performance, including internal and external hitless switching modes of operation, supporting 35 ps and 75 ps phase transients respectively.
Full suite of clock quality metrics and alarms providing full visibility to clock fault monitoring.
Best-in-class < -90dB power supply rejection, enabling designers to reduce noise filtering components leading to a more cost-efficient solution and simplified bill of materials.
In-circuit reconfigurability enabling output frequency changes on the fly system downtime.

遙遙領先Skyworks品牌推出一流的抖動衰減時鐘

Skyworks推出一流的抖動衰減時鐘，以滿足高速通信的計時要求，新的Si536x石英晶振產(chǎn)品系列為400/800G網(wǎng)絡提供超高性能55 fs RMS
Skyworks解決方案公司。(Nasdaq: SWKS)今天推出了最新的抖動衰減器產(chǎn)品組合，用于構成當今互聯(lián)網(wǎng)基礎設施主干的高速網(wǎng)絡、通信和數(shù)據(jù)中心設備。這些新產(chǎn)品旨在滿足為承載5G流量而部署的高速網(wǎng)絡的性能要求，并支持人工智能和邊緣計算等新應用。新的Si536x貼片晶振產(chǎn)品系列補充了Skyworks當前的Si539x抖動衰減時鐘可滿足設計人員和供應商的特定時序需求。
不斷增長的數(shù)據(jù)帶寬需求推動了互聯(lián)網(wǎng)基礎設施和數(shù)據(jù)中心環(huán)境對使用高速56G/112G/224G PAM-4 SerDes和相干光技術的400G/600G/800G+以太網(wǎng)鏈路的需求。Dell'Oro Group預測，這些數(shù)據(jù)速率目前占整個以太網(wǎng)數(shù)據(jù)中心的一半，預計到2025年800G將占主導地位。1這些高速系統(tǒng)要求不同頻率、信號格式和電壓電平的多個時鐘具有超低抖動。
為了滿足這一需求，有源晶振Si536x產(chǎn)品系列在緊湊型時鐘IC解決方案中提供頻率靈活性和時鐘樹片內(nèi)集成，最多可提供18路時鐘輸出，抖動小于55 fs RMS，實現(xiàn)最佳收發(fā)器性能。抖動裕量的增加還有助于降低產(chǎn)品開發(fā)風險，加快網(wǎng)絡設備供應商的上市時間。
“Skyworks的最新產(chǎn)品系列延續(xù)了該公司開發(fā)創(chuàng)新定時解決方案的悠久歷史，其特色是超低抖動DSPLL架構和MultiSynth任意頻率’時鐘合成，”表示詹姆士·威爾森，副總裁兼計時產(chǎn)品總經(jīng)理Skyworks。“這些產(chǎn)品針對下一代高速通信設計，允許我們的客戶利用最高性能、最低抖動的時鐘。"
Skyworks的Si536x系列石英晶體振蕩器提供以下功能和優(yōu)勢:
多達18路輸出，頻率組合最高可達2.75GHz，輸出格式可選，包括LVPECL、LVDS、CML、HCSL和LVCMOS。這些輸出閾值也可以定制，以支持非標準格式的芯片組。
無縫輸入時鐘管理，具有出色的輸入?yún)⒖紩r鐘切換性能，包括內(nèi)部和外部無中斷切換工作模式，分別支持35 ps和75 ps相位瞬變。
全套時鐘質(zhì)量指標和警報，提供時鐘故障監(jiān)控的全面可見性。
同類最佳的<-90dB電源抑制，使設計人員能夠減少噪聲濾波元件，從而實現(xiàn)更具成本效益的解決方案和簡化的物料清單。
在線可重構性，使輸出頻率能夠在系統(tǒng)停機時動態(tài)變化。

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